ARM: dts: exynos: correct PMIC interrupt trigger level on SMDK5250
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 10 Dec 2020 21:25:24 +0000 (22:25 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 22 May 2021 08:40:22 +0000 (10:40 +0200)
commit3b16c8320363eddd6f8fe021f3a2ab71419376d8
tree4eb83049694186e8170753bcc147647dfbaaea6d
parenta9e6199bc423104cc5f27be9ea3bc3dc448f9787
ARM: dts: exynos: correct PMIC interrupt trigger level on SMDK5250

[ Upstream commit f6368c60561370e4a92fac22982a3bd656172170 ]

The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 47580e8d94c2 ("ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-8-krzk@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/boot/dts/exynos5250-smdk5250.dts