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powerpc/fsl-booke: Handle L1 D-cache parity error correctly on e500mc
authorKumar Gala <galak@kernel.crashing.org>
Sat, 27 Aug 2011 11:14:23 +0000 (06:14 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 7 Oct 2011 04:36:55 +0000 (23:36 -0500)
commit37caf9f2a1b99d11ba71e17168d221da9ca13f24
tree0f6c5452edf6d52b84e2d5a088779ad382d75a00tree | snapshot (tar.gz zip)
parent09af52f78e58d9aee0980276833bf3adee3ed07bcommit | diff
powerpc/fsl-booke: Handle L1 D-cache parity error correctly on e500mc

If the L1 D-Cache is in write shadow mode the HW will auto-recover the
error.  However we might still log the error and cause a machine check
(if L1CSR0[CPE] - Cache error checking enable).  We should only treat
the non-write shadow case as non-recoverable.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/include/asm/reg_booke.h diff | blob | blame | history
arch/powerpc/kernel/traps.c diff | blob | blame | history
Motorola kernel-slsi