powerpc/mm: Switch book3s 64 with 64K page size to 4 level page table
authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Tue, 1 Mar 2016 04:15:13 +0000 (09:45 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 3 Mar 2016 10:18:28 +0000 (21:18 +1100)
commit368ced78e6ed3d72c2acc61233b58487071ec289
tree9660d69ec035efb99e5d5de7afffd36f0b1fad57
parentae9a71afa4d7cf29a816fbc387bfd59ad7c292b6
powerpc/mm: Switch book3s 64 with 64K page size to 4 level page table

This is needed so that we can support both hash and radix page table
using single kernel. Radix kernel uses a 4 level table.

We now use physical address in upper page table tree levels. Even though
they are aligned to their size, for the masked bits we use the
bit positions as per PowerISA 3.0.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/Kconfig
arch/powerpc/include/asm/book3s/64/hash-4k.h
arch/powerpc/include/asm/book3s/64/hash-64k.h
arch/powerpc/include/asm/book3s/64/hash.h
arch/powerpc/include/asm/book3s/64/pgtable.h
arch/powerpc/include/asm/pgalloc-64.h
arch/powerpc/include/asm/pgtable-types.h
arch/powerpc/mm/init_64.c