clk: meson8b: fix clk81 register address
authorJerome Brunet <jbrunet@baylibre.com>
Wed, 25 Jan 2017 10:53:06 +0000 (11:53 +0100)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 26 Jan 2017 23:54:48 +0000 (15:54 -0800)
commit340a84ce1eddd6671ce0c57d890fd90f6ae27fa2
tree07fdbaaf9ff8656f670e7841cfdf8676d487d51d
parent88c9b70bb2b2182fda8ef764ab49ec9e175c8ee2
clk: meson8b: fix clk81 register address

During meson8b clock probe, clk81 register address is fixed twice.
First using the meson8b_clk_gates array, then by directly changing
meson8b_clk81 register.

As a result meson8b_clk81.reg = HHI_MPEG_CLK_CNTL + clk_base + clk_base.

Fixed by just removing the second fixup.

Fixes: e31a1900c1ff ("meson: clk: Add support for clock gates")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/meson/meson8b.c