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(parent: f55532a) | patch
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
authorAndrew Bresticker <abrestic@chromium.org>
Thu, 18 Jun 2015 21:28:40 +0000 (17:28 -0400)
committerThierry Reding <treding@nvidia.com>
Thu, 28 Apr 2016 10:41:44 +0000 (12:41 +0200)
commit3358d2d9f47af86bdd71edb24b361f72a54ec04e
tree3ae890b9c2ef525ff6177eb8a2ee154142829719tree | snapshot (tar.gz zip)
parentf55532a0c0b8bb6148f4e07853b876ef73bc69cacommit | diff
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs

On Tegra210, hardware control of the SATA and XUSB pad PLLs must be
done during the UPHY enable sequence rather than the PLLE enable
sequence.  Export functions to do this so that hardware control can
be enabled from the XUSB padctl driver.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra210.c diff | blob | blame | history
include/linux/clk/tegra.h diff | blob | blame | history