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ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <= 16500000
authorAxel Lin <axel.lin@gmail.com>
Wed, 24 Nov 2010 02:21:54 +0000 (10:21 +0800)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Wed, 24 Nov 2010 11:22:44 +0000 (11:22 +0000)
commit2f7dceeda4708f470fd927adb3861bd8ebbe2310
tree5c11b5b659e52997a56d9acc2fe7fd1ec2bb3c83tree | snapshot (tar.gz zip)
parent08b1a38465cab8c2224a5202c7a3b5e5f5630894commit | diff
ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <= 16500000

MCLKDIV bit of Register 04h Clocking1:
0 : Divide by 1
1 : Divide by 2

Thus in the case of freq <= 16500000, we should clear MCLKDIV bit.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
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Motorola kernel-slsi