drm/i915: fix FBC for cases where crtc->base.y is non-zero
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Mon, 14 Sep 2015 18:20:03 +0000 (15:20 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 23 Sep 2015 12:39:20 +0000 (14:39 +0200)
commit2db3366b18e6ee5c6cb09b5f3902bcacfa3d534e
treed119e806f26250d12f492378b77eddb8cdd9dda9
parentb9e831dc3973bddfaa8e27629745c5948ed8b92d
drm/i915: fix FBC for cases where crtc->base.y is non-zero

I only tested this on BDW and SKL, but since the register description
is the same ever since gen4, let's assume that all gens take the same
register format. If that's not true, then hopefully someone will
bisect a bug to this patch and we'll fix it.

Notice that the wrong fence offset register just means that the
hardware tracking will be wrong.

Testcases:
 - igt/kms_frontbuffer_tracking/fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt
 - igt/kms_frontbuffer_tracking/fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt

v2:
  - Add intel_crtc->adjusted_{x,y} so this code can work independently
    of intel_gen4_compute_page_offset(). (Ville).
  - This version also works on SKL.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_fbc.c