clk: tegra: Enable hardware control of PLLE
authorJim Lin <jilin@nvidia.com>
Thu, 15 May 2014 00:32:57 +0000 (17:32 -0700)
committerMike Turquette <mturquette@linaro.org>
Fri, 23 May 2014 05:14:51 +0000 (22:14 -0700)
commit2cfe16748bec853cb6b83d19546dfd226898b222
treeb9fccdbca9baeafb46a3bbe2a24c7366156d46f9
parentc675a00c2d666c8e90da335eafbbae81201d53f7
clk: tegra: Enable hardware control of PLLE

Enable hardware control of PLLE spread-spectrum, IDDQ, and enable
controls when enabling PLLE.  The hardware (e.g. XUSB) using PLLE
will use these controls for power-saving optimizations.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/tegra/clk-pll.c