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(parent: c3d685a) | patch
drm/i915/dp: update training set in a burst write with training pattern set
authorJani Nikula <jani.nikula@intel.com>
Fri, 4 Oct 2013 12:08:48 +0000 (15:08 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 10 Oct 2013 10:47:12 +0000 (12:47 +0200)
commit2cdfe6c8efb9d7dab577d610b6cdab198482cec1
tree545d4a6547b142724bbb0f13abed4048032deb28tree | snapshot (tar.gz zip)
parentc3d685a7a5cd9f18865a717468d2b02092dcefddcommit | diff
drm/i915/dp: update training set in a burst write with training pattern set

The DP spec allows this, and requires it when full link training is
started with non-minimum voltage swing and/or non-zero pre-emphasis.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c diff | blob | blame | history