MIPS: Octeon: Allow more than 3.75GB of memory with PCIe
authorDavid Daney <ddaney@caviumnetworks.com>
Wed, 4 Aug 2010 21:53:57 +0000 (14:53 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 5 Aug 2010 12:26:31 +0000 (13:26 +0100)
commit2b5987abaf2dd6c3934e0376b7d9f64411cdcf03
tree1d3609613faed623728eed98a83565f781201420
parent70dc6f045fce6907b5d10377850a78ada6837ffb
MIPS: Octeon: Allow more than 3.75GB of memory with PCIe

We reserve the 3.75GB - 4GB region of PCIe address space for device to
device transfers, making the corresponding physical memory under
direct mapping unavailable for DMA.

To allow for PCIe DMA to all physical memory we map this chunk of
physical memory with BAR1.  Because of the resulting discontinuity in
the mapping function, we remove a page of memory at each end of the
range so multi-page DMA buffers can never be allocated that span the
range.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1535/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/cavium-octeon/dma-octeon.c
arch/mips/cavium-octeon/setup.c
arch/mips/include/asm/octeon/pci-octeon.h
arch/mips/pci/pcie-octeon.c