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MIPS: Alchemy: Fix db1200 PSC clock enablement
authorManuel Lauss <manuel.lauss@gmail.com>
Mon, 18 Aug 2014 15:10:32 +0000 (17:10 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 19 Aug 2014 11:30:47 +0000 (13:30 +0200)
commit293076f300f52e1593b596b3f09ec057ee6e4a36
tree38ffecccf807f3fdec7759a5a96b22502bbb4ce5tree | snapshot (tar.gz zip)
parent2727cab25a26a0e65e8d9d247ba5a8e9b3e552c7commit | diff
MIPS: Alchemy: Fix db1200 PSC clock enablement

Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone.  This patch
restores functionality to both Audio and I2C/SPI.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7544/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/alchemy/devboards/db1200.c diff | blob | blame | history