coresight: etb: retrieve and handle atclk
authorLinus Walleij <linus.walleij@linaro.org>
Tue, 19 May 2015 16:55:16 +0000 (10:55 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 24 May 2015 18:12:08 +0000 (11:12 -0700)
commit267b2c2358255ab7e709079fbe46f518d73df3a2
tree7b1baa05fb305f8f260c5c570270ae9cdd7b0f5b
parentdb341d3d516a1ae23746f61ea67c5e9918c43bb8
coresight: etb: retrieve and handle atclk

As can be seen from the datasheet of the CoreSight
Components, DDI0314 table A-8 the ETB has a clock signal
apart from the AHB interconnect ("amba_pclk", that we're
already handling) called ATCLK, ARM Trace Clock, that SoC
implementers may provide from an entirely different clock
source. So to model this correctly create an optional
path for handling ATCLK alongside the PCLK so we don't
break old platforms that only define PCLK ("amba_pclk") but
still makes it possible for SoCs that have both clock signals
(such as the DB8500) to fetch and prepare/enable/disable/
unprepare both clocks.

The ATCLK is enabled and disabled using the runtime PM
callbacks.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/hwtracing/coresight/coresight-etb10.c