MIPS: ingenic: Add newer vendor IDs
authorPaul Burton <paul.burton@imgtec.com>
Sun, 24 May 2015 15:11:14 +0000 (16:11 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Sun, 21 Jun 2015 19:52:48 +0000 (21:52 +0200)
commit252617a4ab714db824876e3f9b2b2ede6623e9dc
treec9ab04d5144410d31fdc4695bc5a9cb36cc62991
parentde361e8bb9f666235d44ae9770238718be4f0483
MIPS: ingenic: Add newer vendor IDs

Ingenic have actually varied the vendor/company ID of the XBurst cores
across their range of SoCs, whilst keeping the product ID & revision
constant... Add definitions for vendor IDs known to be used in some of
Ingenic's newer SoCs, and handle them in the same way as the existing
Ingenic vendor ID from the JZ4740.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Co-authored-by: Paul Cercueil <paul@crapouillou.net>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-kernel@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10128/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/cpu.h
arch/mips/kernel/cpu-probe.c