perf/x86/intel/uncore: Handle non-standard counter offset
authorStephane Eranian <eranian@google.com>
Tue, 16 Aug 2016 20:09:49 +0000 (16:09 -0400)
committerIngo Molnar <mingo@kernel.org>
Mon, 5 Sep 2016 11:15:08 +0000 (13:15 +0200)
commit24cf84672e0a1e0d13f3894b60cd820a0140342a
tree6f0052b7e8e2cca6c8c2168e7112346b3fb7e580
parent68ce4a0dea168e99d422aed8f93eca5528fd0e50
perf/x86/intel/uncore: Handle non-standard counter offset

The offset of the counters for UPI and M2M boxes on Skylake server is
non-standard (8 bytes apart).

This patch introduces a custom flag UNCORE_BOX_FLAG_CTL_OFFS8 to
specially handle it.

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/1471378190-17276-2-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/intel/uncore.h