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ARM: l2c: cns3xxx: remove cache size override
authorRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 19 Mar 2014 12:06:27 +0000 (12:06 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 29 May 2014 23:49:07 +0000 (00:49 +0100)
commit24cb65feab42ac0cc26464ac4b7a38c0ab7ce173
tree9488e0a57b27c54878a698c70d59b041bb52ab3atree | snapshot (tar.gz zip)
parenta048711c0b3701ee22efd74022cb1f548a52842ccommit | diff
ARM: l2c: cns3xxx: remove cache size override

The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-cns3xxx/core.c diff | blob | blame | history