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(parent: 73a3eed) | patch
xtensa: Added Cadence CSP kernel configuration for Xtensa
authorScott Telford <stelford@cadence.com>
Thu, 8 Sep 2016 15:41:24 +0000 (16:41 +0100)
committerMax Filippov <jcmvbkbc@gmail.com>
Sat, 10 Sep 2016 01:39:09 +0000 (18:39 -0700)
commit23c2b9321b30f947b4f908e40379eed50f48508c
tree6711b0a36ac4838432064b1b9877c4aa7c993e8btree | snapshot (tar.gz zip)
parent73a3eed0a4800cbe9d99cc6447fed8309d7fcb97commit | diff
xtensa: Added Cadence CSP kernel configuration for Xtensa

Added defconfig, device tree and Xtensa variant header files for the
Cadence Configurable System Platform "xt_lnx" processor configuration.

Signed-off-by: Scott Telford <stelford@cadence.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
arch/xtensa/boot/dts/csp.dts [new file with mode: 0644] blob
arch/xtensa/configs/cadence_csp_defconfig [new file with mode: 0644] blob
arch/xtensa/variants/csp/include/variant/core.h [new file with mode: 0644] blob
arch/xtensa/variants/csp/include/variant/tie-asm.h [new file with mode: 0644] blob
arch/xtensa/variants/csp/include/variant/tie.h [new file with mode: 0644] blob