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(parent: 181fb18) | patch
ath9k_hw: DDR_PLL and BB_PLL need correct setting.
authorVivek Natarajan <vnatarajan@atheros.com>
Thu, 27 Jan 2011 09:15:09 +0000 (14:45 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 28 Jan 2011 20:44:28 +0000 (15:44 -0500)
commit22983c301f01b297a6f85de4757108c6b0eac792
tree152e76ddbdb72f82552ac02e07258df9421f0462tree | snapshot (tar.gz zip)
parent181fb18daaf88a20175b0da70024563b0b7c0666commit | diff
ath9k_hw: DDR_PLL and BB_PLL need correct setting.

Updates from the analog team for AR9485 chipsets to set
DDR_PLL2 and DDR_PLL3. Also program the BB_PLL ki
and kd value.

Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.c diff | blob | blame | history
drivers/net/wireless/ath/ath9k/reg.h diff | blob | blame | history