perf/x86: Fix Intel Ivy Bridge support
authorStephane Eranian <eranian@google.com>
Mon, 10 Sep 2012 23:07:01 +0000 (01:07 +0200)
committerIngo Molnar <mingo@kernel.org>
Wed, 19 Sep 2012 15:28:47 +0000 (17:28 +0200)
commit20a36e39d59757252edbbdcf9574ae2998733ce9
tree888dbef8213571214562b49ff579479686bbbf1e
parentbad9ac2d7f878a31cf1ae8c1ee3768077d222bcb
perf/x86: Fix Intel Ivy Bridge support

This patch updates the existing Intel IvyBridge (model 58)
support with proper PEBS event constraints. It cannot reuse
the same as SandyBridge because some events (0xd3) are
specific to IvyBridge.

Also there is no UOPS_DISPATCHED.THREAD on IVB, so do not
populate the PERF_COUNT_HW_STALLED_CYCLES_BACKEND mapping.

Signed-off-by: Stephane Eranian <eranian@google.com>
Cc: peterz@infradead.org
Cc: ak@linux.intel.com
Link: http://lkml.kernel.org/r/20120910230701.GA5898@quad
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event.h
arch/x86/kernel/cpu/perf_event_intel.c
arch/x86/kernel/cpu/perf_event_intel_ds.c