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(parent: 1d8e1c7) | patch
drm/i915: Write to display base last.
authorChris Wilson <chris@chris-wilson.co.uk>
Sat, 7 Aug 2010 10:01:29 +0000 (11:01 +0100)
committerEric Anholt <eric@anholt.net>
Mon, 9 Aug 2010 18:24:34 +0000 (11:24 -0700)
commit20a0945951705246278f43641bb13611c030e112
tree89c998fd588361566b3a6ff60c1111dab165c7f9tree | snapshot (tar.gz zip)
parent1d8e1c75ffa84400758aef9cc59298920b8801f9commit | diff
drm/i915: Write to display base last.

Writing to the DSPBASE register triggers the double-buffered update to
all the control registers, so always write it last in the update
sequence.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/intel_display.c diff | blob | blame | history