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drm/i915: unify gen6/gen8 rps irq enable/disable
authorImre Deak <imre.deak@intel.com>
Wed, 5 Nov 2014 18:48:42 +0000 (20:48 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 14 Nov 2014 09:29:16 +0000 (10:29 +0100)
commit20415c5d4ecc0075cc7f5cb3f876e3191e9433ce
tree878aa8acf6b7779c6b50e8a2dc16bf8ed38fef49tree | snapshot (tar.gz zip)
parentc9a9a2688256b32af05e4f8c792b243419e41311commit | diff
drm/i915: unify gen6/gen8 rps irq enable/disable

The GEN6 and GEN8 versions differ only in the PM IIR and IER register
addresses and that on GEN8 we need to keep the
GEN8_PMINTR_REDIRECT_TO_NON_DISP PM interrupt unmasked. Abstract away
these 3 things in the GEN6 versions of the helpers and use them
everywhere.

No functional change.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c diff | blob | blame | history