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(parent: c0c4261) | patch
drm/i915 more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)
authorKeith Packard <keithp@keithp.com>
Sun, 17 Feb 2008 03:19:29 +0000 (19:19 -0800)
committerDave Airlie <airlied@redhat.com>
Tue, 19 Feb 2008 23:43:43 +0000 (09:43 +1000)
commit1f84e550a870bf5f5f399b611db68f3324ea7883
treea8f27ad77bcce1f27c22545bafb7e26bcbb3c03dtree | snapshot (tar.gz zip)
parentc0c4261b6fd80f0fc5546ed67058592469a4f5b7commit | diff
drm/i915 more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)

Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on
the VGA output on my HP 2510p after resume.

Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/char/drm/i915_drv.c diff | blob | blame | history
drivers/char/drm/i915_drv.h diff | blob | blame | history