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MIPS: MSA: Fix big-endian FPR_IDX implementation
authorJames Hogan <james.hogan@imgtec.com>
Fri, 30 Jan 2015 12:09:39 +0000 (12:09 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 27 Mar 2015 18:42:48 +0000 (19:42 +0100)
commit1f3a2c6e229ccb8df8115b04d16ad4832767cf3a
tree9af45f0131586543307d1d116002679e44cabec1tree | snapshot (tar.gz zip)
parent466aec5f292be469e15b3dc3d17b731dab93727ccommit | diff
MIPS: MSA: Fix big-endian FPR_IDX implementation

The maximum word size is 64-bits since MSA state is saved using st.d
which stores two 64-bit words, therefore reimplement FPR_IDX using xor,
and only within each 64-bit word.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9169/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/processor.h diff | blob | blame | history
Motorola kernel-slsi