drm/i915: Force ringbuffers to not be at offset 0
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 13 Apr 2016 16:35:11 +0000 (17:35 +0100)
committerJani Nikula <jani.nikula@intel.com>
Mon, 18 Apr 2016 09:35:51 +0000 (12:35 +0300)
commit1b3e885a05d4f0a35dde035724e7c6453d2cbe71
tree4c114b9d7610e36750d878238eb38655b29f6ffc
parent537d3b10086ffae30efbc7c66777c0a08b58d3e6
drm/i915: Force ringbuffers to not be at offset 0

For reasons unknown Sandybridge GT1 (at least) will eventually hang when
it encounters a ring wraparound at offset 0. The test case that
reproduces the bug reliably forces a large number of interrupted context
switches, thereby causing very frequent ring wraparounds, but there are
similar bug reports in the wild with the same symptoms, seqno writes
stop just before the wrap and the ringbuffer at address 0. It is also
timing crucial, but adding various delays hasn't helped pinpoint where
the window lies.

Whether the fault is restricted to the ringbuffer itself or the GTT
addressing is unclear, but moving the ringbuffer fixes all the hangs I
have been able to reproduce.

References: (e.g.) https://bugs.freedesktop.org/show_bug.cgi?id=93262
Testcase: igt/gem_exec_whisper/render-contexts-interruptible #snb-gt1
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1460565315-7748-12-git-send-email-chris@chris-wilson.co.uk
(cherry picked from commit a687a43a48f0f91ba37dce5a14b467258ed6f035)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_ringbuffer.c