drm/i915: Calculate PSR register offsets from base + gen
authorBen Widawsky <benjamin.widawsky@intel.com>
Fri, 20 Sep 2013 16:35:30 +0000 (09:35 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 1 Oct 2013 05:45:12 +0000 (07:45 +0200)
commit18b5992c37560dffc52b84dec7f83738847cf5c7
treef4942bc743519306af364d2d154e3e7ab3786ed6
parent50003939b5a45df44b3b4bd1ccd46e3c50aa5e65
drm/i915: Calculate PSR register offsets from base + gen

Future generations will be changing these registers (thanks to design
for giving us an early heads up). To help abstract, create the
definition of the base of the register block, and define all registers
relative to that.

Design has promised to not change the offsets relative to the base.

v2: Also change IS_HASWELL checks to HAS_PSR

CC: Rodrigo Vivi <rodrigo.vivi@gmail.com>
CC: Intel GFX <intel-gfx@lists.freedesktop.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_dp.c