drm/i915/kbl: Enable PW1 and Misc I/O power wells
authorMichel Thierry <michel.thierry@intel.com>
Wed, 6 Jan 2016 12:08:36 +0000 (12:08 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 7 Jan 2016 14:34:41 +0000 (15:34 +0100)
commit16fbc291cb87c7defcd13ad715d3e4af0d523e43
tree063c9bb690e0011792e9527c8a7e023d0bb74912
parentc03242b1317694e50e2c781026bb7bee8dfcc2bb
drm/i915/kbl: Enable PW1 and Misc I/O power wells

My kbl stopped working because of this.

Fixes regression from
commit 2f693e28b8df69f67beced5e18bb2b91c2bfcec2
Author: Damien Lespiau <damien.lespiau@intel.com>
Date:   Wed Nov 4 19:24:12 2015 +0200
    drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini
    sequences

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1452082116-16770-1-git-send-email-michel.thierry@intel.com
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_runtime_pm.c