pinctrl: armada-37xx: Correct mpp definitions
authorMarek Behún <marek.behun@nic.cz>
Wed, 24 Nov 2021 22:49:29 +0000 (23:49 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 8 Dec 2021 07:46:51 +0000 (08:46 +0100)
commit15d3bc71e322c9591e65ae555de40669fe957f8a
treeb5b6a5f9081403ac73e980d0c0a566a839e614bf
parentd490f96f86837d7216480f6e07bf550bacf69255
pinctrl: armada-37xx: Correct mpp definitions

commit 823868fceae3bac07cf5eccb128d6916e7a5ae9d upstream.

This is a cleanup and fix of the patch by Ken Ma <make@marvell.com>.

Fix the mpp definitions according to newest revision of the
specification:
  - northbridge:
    fix pmic1 gpio number to 7
    fix pmic0 gpio number to 6
  - southbridge
    split pcie1 group bit mask to BIT(5) and  BIT(9)
    fix ptp group bit mask to BIT(11) | BIT(12) | BIT(13)
    add smi group with bit mask BIT(4)

[gregory: split the pcie group in 2, as at hardware level they can be
configured separately]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c