ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state
authorJean Pihet <jean.pihet@newoldbits.com>
Fri, 1 Jun 2012 15:11:07 +0000 (17:11 +0200)
committerKevin Hilman <khilman@ti.com>
Mon, 25 Jun 2012 18:24:24 +0000 (11:24 -0700)
commit13d65c897e93dfeaed6fe28233559239f9676164
tree0e68226def4d9b927ef44abbf6ac742a42680496
parent063a5d011698950c86a01044394105605556e92c
ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state

One of the main contributors of the low power code latency is
the PER power domain. To optimize the high-performance and
low-latency C1 state, prevent any PER state which is lower
than the CORE state in C1.

Reported and suggested by Kevin Hilman.

Reported-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
arch/arm/mach-omap2/cpuidle34xx.c