mmc: meson-gx: remove CLK_DIVIDER_ALLOW_ZERO clock flag
authorJerome Brunet <jbrunet@baylibre.com>
Mon, 21 Aug 2017 16:02:47 +0000 (18:02 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 30 Aug 2017 13:03:41 +0000 (15:03 +0200)
commit130b4bd8f94889e092b8d2fc3c3fe2b483c749a8
tree081c22bd05077cce310273c4092294547df35dfc
parentc1d04caa30ba77eef23c8263566c449751157583
mmc: meson-gx: remove CLK_DIVIDER_ALLOW_ZERO clock flag

Remove CLK_DIVIDER_ALLOW_ZERO. This flag means that a 1 based divider
with a 0 value will behave as a bypass clock

The mmc divider does not behave like this, a 0 value disables the clock
Remove this flag so CCF never allows a 0 value on this clock

Fixes: 51c5d8447bd7 ("MMC: meson: initial support for GX platforms")
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/meson-gx-mmc.c