drm/i915/gvt: Introduce a framework for tracking HW registers.
authorZhi Wang <zhi.a.wang@intel.com>
Tue, 30 Aug 2016 03:06:17 +0000 (11:06 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Fri, 14 Oct 2016 10:11:33 +0000 (18:11 +0800)
commit12d14cc43b34706283246917329b2182163ba9aa
tree1cd78b3bafb560ebe6e109ea5815a5b420dbde71
parent28a60dee2ce6021fa6b304bc6761b71120635ad8
drm/i915/gvt: Introduce a framework for tracking HW registers.

This patch introduces a framework for tracking HW registers on different
GEN platforms.

Accesses to GEN HW registers from VMs will be trapped by hypervisor. It
will forward these emulation requests to GVT-g device model, which
requires this framework to search for related register descriptions.

Each MMIO entry in this framework describes a GEN HW registers, e.g.
offset, length, whether it contains RO bits, whether it can be accessed by
LRIs...and also emulation handlers for emulating register reading and
writing.

- Use i915 MMIO register definition & statement.(Joonas)

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/Makefile
drivers/gpu/drm/i915/gvt/gvt.c
drivers/gpu/drm/i915/gvt/gvt.h
drivers/gpu/drm/i915/gvt/handlers.c [new file with mode: 0644]
drivers/gpu/drm/i915/gvt/mmio.h [new file with mode: 0644]