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(parent: 08bd683) | patch
msm: iommu: Support cache-coherent memory access
authorStepan Moskovchenko <stepanm@codeaurora.org>
Tue, 16 Nov 2010 02:20:08 +0000 (18:20 -0800)
committerDaniel Walker <dwalker@codeaurora.org>
Wed, 1 Dec 2010 00:10:53 +0000 (16:10 -0800)
commit100832c9b6adb3d63407416931caeba3f3b9a777
tree8b1a7ba23f7555ce7fae33c792fe4fcf02d71764tree | snapshot (tar.gz zip)
parent08bd6839783319085ee0db4c888534e626225774commit | diff
msm: iommu: Support cache-coherent memory access

Add support for allowing IOMMU memory transactions to be
cache coherent, eliminating the need for software cache
management in certain situations. This can lead to
improvements in performance and power usage, assuming the
multimedia core's access pattern exhibits spatial locality
and that its working set fits into the cache.

Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
arch/arm/mach-msm/iommu.c diff | blob | blame | history
Motorola kernel-slsi