clk: clock: Fix PCIE100M clock output some corner chip swing small issue
authorShunzhou Jiang <shunzhou.jiang@amlogic.com>
Wed, 25 Jul 2018 08:42:42 +0000 (16:42 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Tue, 31 Jul 2018 03:01:06 +0000 (20:01 -0700)
commit0e7db6285cff60a07593c2ba3377ac4317c2c095
treed43f29bee38cb8e474ae109a649ec03e4f86342d
parent63585c7993778616c75505f034e25b1f6b9fb553
clk: clock: Fix PCIE100M clock output some corner chip swing small issue

PD#170610: clock: Fix PCIE100M clock output

Change-Id: I8ada918f6910b537374115260ebaea7a4489e9d6
Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
drivers/amlogic/clk/g12a/g12a_clk-pll.c