drm/omap: fix i886 work-around
authorTomi Valkeinen <tomi.valkeinen@ti.com>
Tue, 13 Jun 2017 09:02:10 +0000 (12:02 +0300)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Wed, 23 Aug 2017 09:22:09 +0000 (12:22 +0300)
commit0c43f1e02598d304d4cfb06187305445c8207675
tree882a3af2f67b84292cfdff5db2961ab69219b865
parentbeea6214d1cc5bb08ce25ffe06b57fb948445bed
drm/omap: fix i886 work-around

7d267f068a8b4944d52e8b0ae4c8fcc1c1c5c5ba ("drm/omap: work-around for
errata i886") changed how the PLL dividers and multipliers are
calculated. While the new way should work fine for all the PLLs, it
breaks omap5 PLLs. The issues seen are rather odd: seemed that the
output clock rate is half of what we asked. It is unclear what's causing
there issues.

As a work-around this patch adds a "errata_i886" flag, which is set only
for DRA7's PLLs, and the PLL setup is done according to that flag.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
drivers/gpu/drm/omapdrm/dss/dss.h
drivers/gpu/drm/omapdrm/dss/pll.c
drivers/gpu/drm/omapdrm/dss/video-pll.c