git.stricted.de - GitHub/LineageOS/G12/android_kernel_amlogic

author	Thinh Nguyen <Thinh.Nguyen@synopsys.com>
	Fri, 16 Mar 2018 22:33:48 +0000 (15:33 -0700)
committer	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
	Fri, 25 May 2018 14:13:02 +0000 (16:13 +0200)
commit	0acea84f20dbc938200a796fa15d682511bb07e1
tree	51d16a945bd270adcbf0a0306dff55945f67ac0d	tree \| snapshot (tar.gz zip)
parent	70d79bf9fbb997cb3de6f7af08a1f430d576636c	commit \| diff

usb: dwc3: Add SoftReset PHY synchonization delay

[ Upstream commit fab3833338779e1e668bd58d1f76d601657304b8 ]

>From DWC_usb31 programming guide section 1.3.2, once DWC3_DCTL_CSFTRST
bit is cleared, we must wait at least 50ms before accessing the PHY
domain (synchronization delay).

Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>