ASoC: Intel: Used lock version to update shim registers
authorJie Yang <yang.jie@intel.com>
Tue, 20 Jan 2015 23:20:23 +0000 (07:20 +0800)
committerMark Brown <broonie@kernel.org>
Tue, 27 Jan 2015 18:36:22 +0000 (18:36 +0000)
commit09a34aa582aec12c974b08c1ffedb9bd1940565a
tree762cbff0f65747502aa048074d4f18d08e73f9dd
parentf81677b4d1acc0e7cd74a43bfd9900d9512b90ae
ASoC: Intel: Used lock version to update shim registers

We need hold lock each time updating shirm registers, otherwise,
we may set unexpected values to them when they are set in
different thread at different time sequence.

The notification work will be scheduled in global work queue,
which won't hold this sst->spinlock itself, so here we need
change to use the lock version to update shim registers.

Signed-off-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/sst-haswell-ipc.c