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(parent: af8c34c) | patch
x86/msr: Use the proper trace point conditional for writes
authorDr. David Alan Gilbert <dgilbert@redhat.com>
Fri, 3 Jun 2016 18:00:59 +0000 (19:00 +0100)
committerThomas Gleixner <tglx@linutronix.de>
Mon, 6 Jun 2016 13:33:39 +0000 (15:33 +0200)
commit08dd8cd06ed95625b9e2fac43c78fcb45b7eaf94
tree33cdd9a376ba46c2febebb46c531cec9e61a5974tree | snapshot (tar.gz zip)
parentaf8c34ce6ae32addda3788d54a7e340cad22516bcommit | diff
x86/msr: Use the proper trace point conditional for writes

The msr tracing for writes is incorrectly conditional on the read trace.

Fixes: 7f47d8cc039f "x86, tracing, perf: Add trace point for MSR accesses"
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Cc: stable@vger.kernel.org
Cc: ak@linux.intel.com
Link: http://lkml.kernel.org/r/1464976859-21850-1-git-send-email-dgilbert@redhat.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/include/asm/msr.h diff | blob | blame | history