mtd: nand: lpc32xx_slc: fix potential overflow over 4 bits
authorVladimir Zapolskiy <vz@mleia.com>
Wed, 30 Sep 2015 23:23:36 +0000 (02:23 +0300)
committerBrian Norris <computersforpeace@gmail.com>
Sun, 4 Oct 2015 21:30:49 +0000 (22:30 +0100)
commit08d3cd5ef0633df84d119e939d8d1b56c6e4a5e7
tree1163d0aeffd29e437d56f1bdbc52b9ccee109d6c
parent641f6342f507cfe671ac5a58768a8473e14ae2ac
mtd: nand: lpc32xx_slc: fix potential overflow over 4 bits

In case if quotient of controller clock rate to device clock rate does
not fit into 4 bit value, choose the maximum acceptable value 0xF, which
stands for 16 clocks.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
drivers/mtd/nand/lpc32xx_slc.c