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clk: renesas: r8a7796: Add SDIF clocks
authorSimon Horman <horms+renesas@verge.net.au>
Tue, 23 Aug 2016 07:49:44 +0000 (09:49 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 23 Aug 2016 08:30:41 +0000 (10:30 +0200)
commit074969813350cda4c624a585489cc1b3550414bc
tree31b78d1dd957fa52d129b1825b3502a80bbd7486tree | snapshot (tar.gz zip)
parent4e09508a8912b8d2183240bdda14e2e48b4e3176commit | diff
clk: renesas: r8a7796: Add SDIF clocks

This patch adds SDIF clocks for R8A7796 SoC.

Based on work by Ai Kyuse and Yoshihiro Shimoda for the r8a7795 SoC.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7796-cpg-mssr.c diff | blob | blame | history