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drm/i915: Fix PLL 8x/3 divider for MIPI video mode
authorUma Shankar <uma.shankar@intel.com>
Wed, 8 Feb 2017 10:50:51 +0000 (16:20 +0530)
committerJani Nikula <jani.nikula@intel.com>
Wed, 15 Feb 2017 15:32:57 +0000 (17:32 +0200)
commit06a20d2d2d4187b9bc1a4c2f62e989a97a086a76
tree82cfb4f754f3f8644b4a1e0aa5abd0a0103053b9tree | snapshot (tar.gz zip)
parent645a2f6e03ed4a998da4b3642d80dd25d371b6b1commit | diff
drm/i915: Fix PLL 8x/3 divider for MIPI video mode

MIPI Video Mode for high res panels (requiring dual link), need a
8X/3 divider to be programmed as 0x2. Modifying the same
in this patch.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1486551058-22596-3-git-send-email-vidya.srinivas@intel.com
drivers/gpu/drm/i915/intel_dsi_pll.c diff | blob | blame | history