ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless
authorWill Deacon <will.deacon@arm.com>
Thu, 8 Jul 2010 09:58:06 +0000 (10:58 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 9 Jul 2010 10:29:35 +0000 (11:29 +0100)
commit068de8d1be48a04b92fd97f76bb7e113b7be82a8
treea10b8e65776c3d7122799eb7d6b7568d89f1dbbb
parent4082cfa77680a70e407efdfb207c743107bd8fe4
ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless

The atomic64_add_unless function compares an atomic variable with
a given value and, if they are not equal, adds another given value
to the atomic variable. The function returns zero if the addition
did not occur and non-zero otherwise.

On ARM, the return value is initialised to 1 in C code. Inline assembly
code then performs the atomic64_add_unless operation, setting the
return value to 0 iff the addition does not occur. This means that
when the addition *does* occur, the value of ret must be preserved
across the inline assembly and therefore requires a "+r" constraint
rather than the current one of "=&r".

Thanks to Nicolas Pitre for helping to spot this.

Cc: stable@kernel.org
Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/include/asm/atomic.h