clk: mediatek: make dpi0_sel propagate rate changes
authorPhilipp Zabel <p.zabel@pengutronix.de>
Mon, 4 Jan 2016 17:36:42 +0000 (18:36 +0100)
committerPhilipp Zabel <p.zabel@pengutronix.de>
Fri, 6 May 2016 15:47:39 +0000 (17:47 +0200)
commit06445994fece2ae458419fbadc1b2107336615d6
treedb5614908e08c10419292a78936d0938e4ae7d89
parent9e629c17aa8d7a75b8c1d99ed42892cd8ba7cdc4
clk: mediatek: make dpi0_sel propagate rate changes

This mux is supposed to select a fitting divider after the PLL
is already set to the correct rate.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/mediatek/clk-mt8173.c
drivers/clk/mediatek/clk-mtk.h