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ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC
authorChen-Yu Tsai <wens@csie.org>
Thu, 21 Jan 2016 05:26:41 +0000 (13:26 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Sun, 24 Jan 2016 23:01:21 +0000 (00:01 +0100)
commit02df9cb85e156924339f2244aec29dcc37d9ab8c
tree52ef35fe3698685775daf6cef53aa2605aa153c8tree | snapshot (tar.gz zip)
parent675ec62b08480fe1250c70cba61ad6e74652ed6fcommit | diff
ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC

mmc2 has a special pin for eMMC hardware reset, which is controllable
from the controller. Add the "mmc-cap-hw-reset" property to denote that
this controller supports this function, and the pins are actually used.

Also increase the signal drive strength for mmc2 pins, for HS-DDR mode
support.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun9i-a80-optimus.dts diff | blob | blame | history