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(parent: fbc6ae3) | patch
mfd: lpc_ich: Fix gpio base and control offsets
authorAaron Sierra <asierra@xes-inc.com>
Thu, 24 Jan 2013 20:52:39 +0000 (14:52 -0600)
committerSamuel Ortiz <sameo@linux.intel.com>
Wed, 13 Feb 2013 23:22:52 +0000 (00:22 +0100)
commit01560f6bb958b821ceec98590a7147d610a62625
tree56a8aedbbe9d8f266e4d8a8405aa3dee79c36f3etree | snapshot (tar.gz zip)
parentfbc6ae363e5e589a28135c051a2ff835e6236d5fcommit | diff
mfd: lpc_ich: Fix gpio base and control offsets

In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
properly be enabled (and disabled) for these chipsets.

Signed-off-by: Agócs Pál <agocs.pal.86@gmail.com>
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
drivers/mfd/lpc_ich.c diff | blob | blame | history