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(parent: e5f186c) | patch
drm/nv41/vm: fix and enable use of "real" pciegart
authorBen Skeggs <bskeggs@redhat.com>
Wed, 26 Sep 2012 22:56:24 +0000 (08:56 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Wed, 3 Oct 2012 03:13:17 +0000 (13:13 +1000)
commit002d0c735c1bd8bffd3786ad5aadb205a76878fa
treee66e49d08d303cf7287de35347e4ce94d33d0083tree | snapshot (tar.gz zip)
parente5f186c4f9812eccbc291da6dfe8b15da546f961commit | diff
drm/nv41/vm: fix and enable use of "real" pciegart

Hopefully fixed the tlb flush timeout issue.  Was able to observe this
condition occur occasionally, and it appears the binary driver doesn't
wait on the old condition either..

Should give 39-bit DMA addressing on the relevant chipsets.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/core/subdev/device/nv40.c diff | blob | blame | history
drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c diff | blob | blame | history
Motorola kernel-slsi