X-Git-Url: https://git.stricted.de/?a=blobdiff_plain;f=Documentation%2FDMA-attributes.txt;h=b768cc0e402b8e6f1cfa8ae0b0f23c4e1c50168a;hb=9b4d0bab32e18e4f72781f9fa309a81495b2aff3;hp=6d772f84b477c9f5a4698e87d50fb63649af83d3;hpb=9781db7b345b5dfe93787aaaf310c861db7c1ede;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git

diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
index 6d772f84b477..b768cc0e402b 100644
--- a/Documentation/DMA-attributes.txt
+++ b/Documentation/DMA-attributes.txt
@@ -22,3 +22,12 @@ ready and available in memory.  The DMA of the "completion indication"
 could race with data DMA.  Mapping the memory used for completion
 indications with DMA_ATTR_WRITE_BARRIER would prevent the race.
 
+DMA_ATTR_WEAK_ORDERING
+----------------------
+
+DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
+may be weakly ordered, that is that reads and writes may pass each other.
+
+Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
+those that do not will simply ignore the attribute and exhibit default
+behavior.