[ARM] 3581/1: AT91RM9200 Internal SRAM

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-arm / arch-at91rm9200 / uncompress.h

diff --git a/include/asm-arm/arch-at91rm9200/uncompress.h b/include/asm-arm/arch-at91rm9200/uncompress.h
index b30dd5520713d73653deb2c62182e5b328f50857..7b38497c24b5adf118c2960a5977896a984e765c 100644 (file)
--- a/include/asm-arm/arch-at91rm9200/uncompress.h
+++ b/include/asm-arm/arch-at91rm9200/uncompress.h
@@ -31,21 +31,22 @@
  *
  * This does not append a newline
  */
-static void putstr(const char *s)
+static void putc(int c)
+{
+       void __iomem *sys = (void __iomem *) AT91_BASE_SYS;     /* physical address */
+
+       while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY))
+               barrier();
+       __raw_writel(c, sys + AT91_DBGU_THR);
+}
+
+static inline void flush(void)
 {
        void __iomem *sys = (void __iomem *) AT91_BASE_SYS;     /* physical address */
 
-       while (*s) {
-               while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
-               __raw_writel(*s, sys + AT91_DBGU_THR);
-               if (*s == '\n') {
-                       while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
-                       __raw_writel('\r', sys + AT91_DBGU_THR);
-               }
-               s++;
-       }
        /* wait for transmission to complete */
-       while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) { barrier(); }
+       while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
+               barrier();
 }
 
 #define arch_decomp_setup()