{
.id = V4L2_STD_PAL_M,
.sif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x08},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x62},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfe},
- {REQ_07_SET_GET_AVREG, 0xfe, 0xcb},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
{0, 0, 0},
},
.nosif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x60},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
{0, 0, 0},
},
.common = {
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x04},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x00},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x1e},
- {REQ_07_SET_GET_AVREG, 0x19, 0x83},
- {REQ_07_SET_GET_AVREG, 0x1a, 0x0a},
- {REQ_07_SET_GET_AVREG, 0x1b, 0xe0},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x88},
- {REQ_07_SET_GET_AVREG, 0x30, 0x20},
- {REQ_07_SET_GET_AVREG, 0x31, 0x61},
- {REQ_07_SET_GET_AVREG, 0x33, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x52},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdc},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x04},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x83},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x0a},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe0},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x20},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_PAL_Nc,
.sif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x08},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x62},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfe},
- {REQ_07_SET_GET_AVREG, 0xfe, 0xcb},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
{0, 0, 0},
},
.nosif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x60},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
{0, 0, 0},
},
.common = {
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x36},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x02},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x1e},
- {REQ_07_SET_GET_AVREG, 0x19, 0x91},
- {REQ_07_SET_GET_AVREG, 0x1a, 0x1f},
- {REQ_07_SET_GET_AVREG, 0x1b, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x8c},
- {REQ_07_SET_GET_AVREG, 0x30, 0x2c},
- {REQ_07_SET_GET_AVREG, 0x31, 0xc1},
- {REQ_07_SET_GET_AVREG, 0x33, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x52},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdc},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x36},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x91},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x1f},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x0c},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_PAL,
.sif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x08},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x62},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfe},
- {REQ_07_SET_GET_AVREG, 0xfe, 0xcb},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
{0, 0, 0}
},
.nosif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x60},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
{0, 0, 0},
},
.common = {
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x32},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x02},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x25},
- {REQ_07_SET_GET_AVREG, 0x19, 0xd5},
- {REQ_07_SET_GET_AVREG, 0x1a, 0x63},
- {REQ_07_SET_GET_AVREG, 0x1b, 0x50},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x8c},
- {REQ_07_SET_GET_AVREG, 0x30, 0x2c},
- {REQ_07_SET_GET_AVREG, 0x31, 0xc1},
- {REQ_07_SET_GET_AVREG, 0x33, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x52},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdc},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x32},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x25},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0xd5},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x63},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x50},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_SECAM,
.sif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x08},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x62},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfe},
- {REQ_07_SET_GET_AVREG, 0xfe, 0xcb},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
{0, 0, 0},
},
.nosif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x60},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
{0, 0, 0},
},
.common = {
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x38},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x02},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x24},
- {REQ_07_SET_GET_AVREG, 0x19, 0x92},
- {REQ_07_SET_GET_AVREG, 0x1a, 0xe8},
- {REQ_07_SET_GET_AVREG, 0x1b, 0xed},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x8c},
- {REQ_07_SET_GET_AVREG, 0x30, 0x2c},
- {REQ_07_SET_GET_AVREG, 0x31, 0xc1},
- {REQ_07_SET_GET_AVREG, 0x33, 0x2c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x18},
- {REQ_07_SET_GET_AVREG, 0x82, 0x42},
- {REQ_07_SET_GET_AVREG, 0x83, 0xFF},
-
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF},
+
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_NTSC,
.sif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x08},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x62},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfe},
- {REQ_07_SET_GET_AVREG, 0xfe, 0xcb},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
{0, 0, 0},
},
.nosif = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x60},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
{0, 0, 0},
},
.common = {
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x00},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0f},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x00},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x1e},
- {REQ_07_SET_GET_AVREG, 0x19, 0x8b},
- {REQ_07_SET_GET_AVREG, 0x1a, 0xa2},
- {REQ_07_SET_GET_AVREG, 0x1b, 0xe9},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x88},
- {REQ_07_SET_GET_AVREG, 0x30, 0x22},
- {REQ_07_SET_GET_AVREG, 0x31, 0x61},
- {REQ_07_SET_GET_AVREG, 0x33, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x42},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdd},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdd},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
},
{
.id = V4L2_STD_PAL_M,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf4},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x04},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x00},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x1e},
- {REQ_07_SET_GET_AVREG, 0x19, 0x83},
- {REQ_07_SET_GET_AVREG, 0x1a, 0x0a},
- {REQ_07_SET_GET_AVREG, 0x1b, 0xe0},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x88},
- {REQ_07_SET_GET_AVREG, 0x30, 0x20},
- {REQ_07_SET_GET_AVREG, 0x31, 0x61},
- {REQ_07_SET_GET_AVREG, 0x33, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x52},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdc},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x04},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x83},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x0a},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe0},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x20},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_PAL_Nc,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf4},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x36},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x02},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x1e},
- {REQ_07_SET_GET_AVREG, 0x19, 0x91},
- {REQ_07_SET_GET_AVREG, 0x1a, 0x1f},
- {REQ_07_SET_GET_AVREG, 0x1b, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x8c},
- {REQ_07_SET_GET_AVREG, 0x30, 0x2c},
- {REQ_07_SET_GET_AVREG, 0x31, 0xc1},
- {REQ_07_SET_GET_AVREG, 0x33, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x52},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdc},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x36},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x91},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x1f},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x0c},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_PAL,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf4},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x32},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x02},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x25},
- {REQ_07_SET_GET_AVREG, 0x19, 0xd5},
- {REQ_07_SET_GET_AVREG, 0x1a, 0x63},
- {REQ_07_SET_GET_AVREG, 0x1b, 0x50},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x8c},
- {REQ_07_SET_GET_AVREG, 0x30, 0x2c},
- {REQ_07_SET_GET_AVREG, 0x31, 0xc1},
- {REQ_07_SET_GET_AVREG, 0x33, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x52},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdc},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x32},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x25},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0xd5},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x63},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x50},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_SECAM,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf4},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x38},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x02},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x24},
- {REQ_07_SET_GET_AVREG, 0x19, 0x92},
- {REQ_07_SET_GET_AVREG, 0x1a, 0xe8},
- {REQ_07_SET_GET_AVREG, 0x1b, 0xed},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x8c},
- {REQ_07_SET_GET_AVREG, 0x30, 0x2c},
- {REQ_07_SET_GET_AVREG, 0x31, 0xc1},
- {REQ_07_SET_GET_AVREG, 0x33, 0x2c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x18},
- {REQ_07_SET_GET_AVREG, 0x82, 0x42},
- {REQ_07_SET_GET_AVREG, 0x83, 0xFF},
-
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF},
+
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_NTSC,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf4},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf3},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x0f},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf1},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe8},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8b},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x00},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0f},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x00},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x1e},
- {REQ_07_SET_GET_AVREG, 0x19, 0x8b},
- {REQ_07_SET_GET_AVREG, 0x1a, 0xa2},
- {REQ_07_SET_GET_AVREG, 0x1b, 0xe9},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x88},
- {REQ_07_SET_GET_AVREG, 0x30, 0x22},
- {REQ_07_SET_GET_AVREG, 0x31, 0x61},
- {REQ_07_SET_GET_AVREG, 0x33, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x42},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdd},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdd},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
},
{
.id = V4L2_STD_PAL_M,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xfc},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x00},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8a},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x05},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x04},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x1e},
- {REQ_07_SET_GET_AVREG, 0x19, 0x83},
- {REQ_07_SET_GET_AVREG, 0x1a, 0x0a},
- {REQ_07_SET_GET_AVREG, 0x1b, 0xe0},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x88},
- {REQ_07_SET_GET_AVREG, 0x30, 0x22},
- {REQ_07_SET_GET_AVREG, 0x31, 0x61},
- {REQ_07_SET_GET_AVREG, 0x33, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x52},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdc},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x05},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x04},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x83},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x0a},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe0},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_PAL_Nc,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xfc},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x00},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8a},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x37},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x04},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x1e},
- {REQ_07_SET_GET_AVREG, 0x19, 0x91},
- {REQ_07_SET_GET_AVREG, 0x1a, 0x1f},
- {REQ_07_SET_GET_AVREG, 0x1b, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x88},
- {REQ_07_SET_GET_AVREG, 0x30, 0x22},
- {REQ_07_SET_GET_AVREG, 0x31, 0xc1},
- {REQ_07_SET_GET_AVREG, 0x33, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x52},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdc},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x37},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x04},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x91},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x1f},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x0c},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_PAL,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xfc},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x00},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8a},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x33},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x04},
- {REQ_07_SET_GET_AVREG, 0x07, 0x00},
- {REQ_07_SET_GET_AVREG, 0x18, 0x25},
- {REQ_07_SET_GET_AVREG, 0x19, 0xd5},
- {REQ_07_SET_GET_AVREG, 0x1a, 0x63},
- {REQ_07_SET_GET_AVREG, 0x1b, 0x50},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x8c},
- {REQ_07_SET_GET_AVREG, 0x30, 0x2a},
- {REQ_07_SET_GET_AVREG, 0x31, 0xc1},
- {REQ_07_SET_GET_AVREG, 0x33, 0x0c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x52},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdc},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x33},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x04},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x00},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x25},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0xd5},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x63},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x50},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2a},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_SECAM,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xfc},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x00},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8a},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x39},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0e},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x03},
- {REQ_07_SET_GET_AVREG, 0x07, 0x01},
- {REQ_07_SET_GET_AVREG, 0x18, 0x24},
- {REQ_07_SET_GET_AVREG, 0x19, 0x92},
- {REQ_07_SET_GET_AVREG, 0x1a, 0xe8},
- {REQ_07_SET_GET_AVREG, 0x1b, 0xed},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x8c},
- {REQ_07_SET_GET_AVREG, 0x30, 0x2a},
- {REQ_07_SET_GET_AVREG, 0x31, 0xc1},
- {REQ_07_SET_GET_AVREG, 0x33, 0x2c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x18},
- {REQ_07_SET_GET_AVREG, 0x82, 0x42},
- {REQ_07_SET_GET_AVREG, 0x83, 0xFF},
-
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x39},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x03},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2a},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF},
+
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
}, {
.id = V4L2_STD_NTSC,
.common = {
- {REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xfc},
- {REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf8},
- {REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x00},
- {REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf2},
- {REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xf0},
- {REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2},
- {REQ_08_SET_GET_AVREG_BIT, 0xed, 0xe0},
- {REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x68},
- {REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc},
- {REQ_07_SET_GET_AVREG, 0xfe, 0x8a},
-
- {REQ_07_SET_GET_AVREG, 0x3f, 0x01},
- {REQ_07_SET_GET_AVREG, 0x00, 0x01},
- {REQ_07_SET_GET_AVREG, 0x01, 0x0f},
- {REQ_07_SET_GET_AVREG, 0x02, 0x5f},
- {REQ_07_SET_GET_AVREG, 0x03, 0x03},
- {REQ_07_SET_GET_AVREG, 0x07, 0x00},
- {REQ_07_SET_GET_AVREG, 0x17, 0x8b},
- {REQ_07_SET_GET_AVREG, 0x18, 0x1e},
- {REQ_07_SET_GET_AVREG, 0x19, 0x8b},
- {REQ_07_SET_GET_AVREG, 0x1a, 0xa2},
- {REQ_07_SET_GET_AVREG, 0x1b, 0xe9},
- {REQ_07_SET_GET_AVREG, 0x1c, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x1d, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1e, 0xcc},
- {REQ_07_SET_GET_AVREG, 0x1f, 0xcd},
- {REQ_07_SET_GET_AVREG, 0x2e, 0x88},
- {REQ_07_SET_GET_AVREG, 0x30, 0x22},
- {REQ_07_SET_GET_AVREG, 0x31, 0x61},
- {REQ_07_SET_GET_AVREG, 0x33, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x35, 0x1c},
- {REQ_07_SET_GET_AVREG, 0x82, 0x42},
- {REQ_07_SET_GET_AVREG, 0x83, 0x6F},
-
- {REQ_07_SET_GET_AVREG, 0x04, 0xdd},
- {REQ_07_SET_GET_AVREG, 0x0d, 0x07},
- {REQ_07_SET_GET_AVREG, 0x3f, 0x00},
+ {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
+ {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
+ {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
+ {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
+ {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
+ {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
+ {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
+ {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
+ {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
+ {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
+ {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
+
+ {TM6010_REQ07_R3F_RESET, 0x01},
+ {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x01},
+ {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f},
+ {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
+ {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x03},
+ {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x00},
+ {TM6010_REQ07_R17_HLOOP_MAXSTATE, 0x8b},
+ {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
+ {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b},
+ {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2},
+ {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9},
+ {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
+ {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
+ {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
+ {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
+ {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88},
+ {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22},
+ {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61},
+ {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c},
+ {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
+ {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
+ {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
+
+ {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdd},
+ {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
+ {TM6010_REQ07_R3F_RESET, 0x00},
{0, 0, 0},
},
},