drm/i915: Program DSPCLK_GATE_D only once on Ironlake

[GitHub/MotorolaMobilityLLC/kernel-slsi.git] / drivers / gpu / drm / i915 / intel_pm.c

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d2a226a7658c7327d7c9106eb66e9efc4052ef45..a0804ebdfd68e635158e25278669beb80577ee1e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3298,11 +3298,9 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
        uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
 
        /* Required for FBC */
-       dspclk_gate |= ILK_DPFCUNIT_CLOCK_GATE_DISABLE |
-               ILK_DPFCRUNIT_CLOCK_GATE_DISABLE |
-               ILK_DPFDUNIT_CLOCK_GATE_ENABLE;
-       /* Required for CxSR */
-       dspclk_gate |= ILK_DPARBUNIT_CLOCK_GATE_ENABLE;
+       dspclk_gate |= ILK_DPFCRUNIT_CLOCK_GATE_DISABLE |
+                  ILK_DPFCUNIT_CLOCK_GATE_DISABLE |
+                  ILK_DPFDUNIT_CLOCK_GATE_ENABLE;
 
        I915_WRITE(PCH_3DCGDIS0,
                   MARIUNIT_CLOCK_GATE_DISABLE |
@@ -3310,8 +3308,6 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
        I915_WRITE(PCH_3DCGDIS1,
                   VFMUNIT_CLOCK_GATE_DISABLE);
 
-       I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate);
-
        /*
         * According to the spec the following bits should be set in
         * order to enable memory self-refresh
@@ -3322,9 +3318,7 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
        I915_WRITE(ILK_DISPLAY_CHICKEN2,
                   (I915_READ(ILK_DISPLAY_CHICKEN2) |
                    ILK_DPARB_GATE | ILK_VSDPFD_FULL));
-       I915_WRITE(ILK_DSPCLK_GATE_D,
-                  (I915_READ(ILK_DSPCLK_GATE_D) |
-                   ILK_DPARBUNIT_CLOCK_GATE_ENABLE));
+       dspclk_gate |= ILK_DPARBUNIT_CLOCK_GATE_ENABLE;
        I915_WRITE(DISP_ARB_CTL,
                   (I915_READ(DISP_ARB_CTL) |
                    DISP_FBC_WM_DIS));
@@ -3346,13 +3340,10 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
                I915_WRITE(ILK_DISPLAY_CHICKEN2,
                           I915_READ(ILK_DISPLAY_CHICKEN2) |
                           ILK_DPARB_GATE);
-               I915_WRITE(ILK_DSPCLK_GATE_D,
-                          I915_READ(ILK_DSPCLK_GATE_D) |
-                          ILK_DPFCRUNIT_CLOCK_GATE_DISABLE |
-                          ILK_DPFCUNIT_CLOCK_GATE_DISABLE |
-                          ILK_DPFDUNIT_CLOCK_GATE_ENABLE);
        }
 
+       I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate);
+
        I915_WRITE(ILK_DISPLAY_CHICKEN2,
                   I915_READ(ILK_DISPLAY_CHICKEN2) |
                   ILK_ELPIN_409_SELECT);