include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / kernel / irqinit.c

diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index fce55d53263111c408070a15da306165304955c4..0ed2d300cd4601dbbf23e15e32eae363d5058a5a 100644 (file)
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -5,7 +5,6 @@
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <linux/timex.h>
-#include <linux/slab.h>
 #include <linux/random.h>
 #include <linux/kprobes.h>
 #include <linux/init.h>
@@ -99,9 +98,6 @@ int vector_used_by_percpu_irq(unsigned int vector)
        return 0;
 }
 
-/* Number of legacy interrupts */
-int nr_legacy_irqs __read_mostly = NR_IRQS_LEGACY;
-
 void __init init_ISA_irqs(void)
 {
        int i;
@@ -109,12 +105,12 @@ void __init init_ISA_irqs(void)
 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
        init_bsp_APIC();
 #endif
-       init_8259A(0);
+       legacy_pic->init(0);
 
        /*
         * 16 old-style INTA-cycle interrupts:
         */
-       for (i = 0; i < NR_IRQS_LEGACY; i++) {
+       for (i = 0; i < legacy_pic->nr_legacy_irqs; i++) {
                struct irq_desc *desc = irq_to_desc(i);
 
                desc->status = IRQ_DISABLED;
@@ -138,12 +134,34 @@ void __init init_IRQ(void)
         * then this vector space can be freed and re-used dynamically as the
         * irq's migrate etc.
         */
-       for (i = 0; i < nr_legacy_irqs; i++)
+       for (i = 0; i < legacy_pic->nr_legacy_irqs; i++)
                per_cpu(vector_irq, 0)[IRQ0_VECTOR + i] = i;
 
        x86_init.irqs.intr_init();
 }
 
+/*
+ * Setup the vector to irq mappings.
+ */
+void setup_vector_irq(int cpu)
+{
+#ifndef CONFIG_X86_IO_APIC
+       int irq;
+
+       /*
+        * On most of the platforms, legacy PIC delivers the interrupts on the
+        * boot cpu. But there are certain platforms where PIC interrupts are
+        * delivered to multiple cpu's. If the legacy IRQ is handled by the
+        * legacy PIC, for the new cpu that is coming online, setup the static
+        * legacy vector to irq mapping:
+        */
+       for (irq = 0; irq < legacy_pic->nr_legacy_irqs; irq++)
+               per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq;
+#endif
+
+       __setup_vector_irq(cpu);
+}
+
 static void __init smp_intr_init(void)
 {
 #ifdef CONFIG_SMP