amd-iommu: fix an off-by-one error in the AMD IOMMU driver.

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / kernel / amd_iommu_init.c

diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index fb85e8d466cca7ae35304da0ef94a288fa667fe9..35fc9654c7a8bb81c9c3bd731f2f1960dda3d1e8 100644 (file)
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -49,10 +49,10 @@
 #define IVHD_DEV_EXT_SELECT             0x46
 #define IVHD_DEV_EXT_SELECT_RANGE       0x47
 
-#define IVHD_FLAG_HT_TUN_EN             0x00
-#define IVHD_FLAG_PASSPW_EN             0x01
-#define IVHD_FLAG_RESPASSPW_EN          0x02
-#define IVHD_FLAG_ISOC_EN               0x03
+#define IVHD_FLAG_HT_TUN_EN_MASK        0x01
+#define IVHD_FLAG_PASSPW_EN_MASK        0x02
+#define IVHD_FLAG_RESPASSPW_EN_MASK     0x04
+#define IVHD_FLAG_ISOC_EN_MASK          0x08
 
 #define IVMD_FLAG_EXCL_RANGE            0x08
 #define IVMD_FLAG_UNITY_MAP             0x01
@@ -122,7 +122,8 @@ u16 amd_iommu_last_bdf;                     /* largest PCI device id we have
 LIST_HEAD(amd_iommu_unity_map);                /* a list of required unity mappings
                                           we find in ACPI */
 unsigned amd_iommu_aperture_order = 26; /* size of aperture in power of 2 */
-int amd_iommu_isolate = 1;             /* if 1, device isolation is enabled */
+bool amd_iommu_isolate = true;         /* if true, device isolation is
+                                          enabled */
 bool amd_iommu_unmap_flush;            /* if true, flush on every unmap */
 
 LIST_HEAD(amd_iommu_list);             /* list of all AMD IOMMUs in the
@@ -174,7 +175,7 @@ static inline void update_last_devid(u16 devid)
 static inline unsigned long tbl_size(int entry_size)
 {
        unsigned shift = PAGE_SHIFT +
-                        get_order(amd_iommu_last_bdf * entry_size);
+                        get_order(((int)amd_iommu_last_bdf + 1) * entry_size);
 
        return 1UL << shift;
 }
@@ -245,12 +246,8 @@ static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
 /* Function to enable the hardware */
 static void __init iommu_enable(struct amd_iommu *iommu)
 {
-       printk(KERN_INFO "AMD IOMMU: Enabling IOMMU "
-              "at %02x:%02x.%x cap 0x%hx\n",
-              iommu->dev->bus->number,
-              PCI_SLOT(iommu->dev->devfn),
-              PCI_FUNC(iommu->dev->devfn),
-              iommu->cap_ptr);
+       printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at %s cap 0x%hx\n",
+              dev_name(&iommu->dev->dev), iommu->cap_ptr);
 
        iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
 }
@@ -572,19 +569,19 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu,
         * First set the recommended feature enable bits from ACPI
         * into the IOMMU control registers
         */
-       h->flags & IVHD_FLAG_HT_TUN_EN ?
+       h->flags & IVHD_FLAG_HT_TUN_EN_MASK ?
                iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
                iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
 
-       h->flags & IVHD_FLAG_PASSPW_EN ?
+       h->flags & IVHD_FLAG_PASSPW_EN_MASK ?
                iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
                iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
 
-       h->flags & IVHD_FLAG_RESPASSPW_EN ?
+       h->flags & IVHD_FLAG_RESPASSPW_EN_MASK ?
                iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
                iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
 
-       h->flags & IVHD_FLAG_ISOC_EN ?
+       h->flags & IVHD_FLAG_ISOC_EN_MASK ?
                iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
                iommu_feature_disable(iommu, CONTROL_ISOC_EN);
 
@@ -1218,9 +1215,9 @@ static int __init parse_amd_iommu_options(char *str)
 {
        for (; *str; ++str) {
                if (strncmp(str, "isolate", 7) == 0)
-                       amd_iommu_isolate = 1;
+                       amd_iommu_isolate = true;
                if (strncmp(str, "share", 5) == 0)
-                       amd_iommu_isolate = 0;
+                       amd_iommu_isolate = false;
                if (strncmp(str, "fullflush", 9) == 0)
                        amd_iommu_unmap_flush = true;
        }