sparc64: Add global PMU register dumping via sysrq.

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / sparc / mm / ultra.S

diff --git a/arch/sparc/mm/ultra.S b/arch/sparc/mm/ultra.S
index 874162a11ceb824eb9e1af311c81be052a934927..f8e13d421fcbf415dd49a50bc2ed4aaf2b3b6494 100644 (file)
--- a/arch/sparc/mm/ultra.S
+++ b/arch/sparc/mm/ultra.S
@@ -481,8 +481,8 @@ xcall_sync_tick:
 
        .globl          xcall_fetch_glob_regs
 xcall_fetch_glob_regs:
-       sethi           %hi(global_reg_snapshot), %g1
-       or              %g1, %lo(global_reg_snapshot), %g1
+       sethi           %hi(global_cpu_snapshot), %g1
+       or              %g1, %lo(global_cpu_snapshot), %g1
        __GET_CPUID(%g2)
        sllx            %g2, 6, %g3
        add             %g1, %g3, %g1
@@ -509,6 +509,66 @@ xcall_fetch_glob_regs:
        stx             %g3, [%g1 + GR_SNAP_THREAD]
        retry
 
+       .globl          xcall_fetch_glob_pmu
+xcall_fetch_glob_pmu:
+       sethi           %hi(global_cpu_snapshot), %g1
+       or              %g1, %lo(global_cpu_snapshot), %g1
+       __GET_CPUID(%g2)
+       sllx            %g2, 6, %g3
+       add             %g1, %g3, %g1
+       rd              %pic, %g7
+       stx             %g7, [%g1 + (4 * 8)]
+       rd              %pcr, %g7
+       stx             %g7, [%g1 + (0 * 8)]
+       retry
+
+       .globl          xcall_fetch_glob_pmu_n4
+xcall_fetch_glob_pmu_n4:
+       sethi           %hi(global_cpu_snapshot), %g1
+       or              %g1, %lo(global_cpu_snapshot), %g1
+       __GET_CPUID(%g2)
+       sllx            %g2, 6, %g3
+       add             %g1, %g3, %g1
+
+       ldxa            [%g0] ASI_PIC, %g7
+       stx             %g7, [%g1 + (4 * 8)]
+       mov             0x08, %g3
+       ldxa            [%g3] ASI_PIC, %g7
+       stx             %g7, [%g1 + (5 * 8)]
+       mov             0x10, %g3
+       ldxa            [%g3] ASI_PIC, %g7
+       stx             %g7, [%g1 + (6 * 8)]
+       mov             0x18, %g3
+       ldxa            [%g3] ASI_PIC, %g7
+       stx             %g7, [%g1 + (7 * 8)]
+
+       mov             %o0, %g2
+       mov             %o1, %g3
+       mov             %o5, %g7
+
+       mov             HV_FAST_VT_GET_PERFREG, %o5
+       mov             3, %o0
+       ta              HV_FAST_TRAP
+       stx             %o1, [%g1 + (3 * 8)]
+       mov             HV_FAST_VT_GET_PERFREG, %o5
+       mov             2, %o0
+       ta              HV_FAST_TRAP
+       stx             %o1, [%g1 + (2 * 8)]
+       mov             HV_FAST_VT_GET_PERFREG, %o5
+       mov             1, %o0
+       ta              HV_FAST_TRAP
+       stx             %o1, [%g1 + (1 * 8)]
+       mov             HV_FAST_VT_GET_PERFREG, %o5
+       mov             0, %o0
+       ta              HV_FAST_TRAP
+       stx             %o1, [%g1 + (0 * 8)]
+
+       mov             %g2, %o0
+       mov             %g3, %o1
+       mov             %g7, %o5
+
+       retry
+
 #ifdef DCACHE_ALIASING_POSSIBLE
        .align          32
        .globl          xcall_flush_dcache_page_cheetah